1. Field of the Invention
The present invention relates to a technology for encoding and decoding a bit string, realizing a decrease of an error rate even with a high code rate, while reducing a circuit size.
2. Description of the Related Art
Conventionally, a recording method for recording data in a memory unit such as a magnetic disk and a magneto-optical disk includes a longitudinal recording method in which a magnetic field is applied along a magnetic disk surface, and a perpendicular recording method in which a magnetic field is applied perpendicularly to a magnetic recording surface.
The perpendicular recording method has more resistance to a thermal fluctuation than the longitudinal recording method, and can increase the surface recording density. Accordingly, storage devices using the perpendicular recording method have been actively produced recently.
In the longitudinal recording method, the waveform of a recording and reproduction signal is a pulse wave, while in the perpendicular recording method, the waveform of the recording and reproduction signal is a rectangular wave.
However, since a preamplifier that performs recording and reproduction of information on the magnetic recording surface via a magnetic head has a high-pass filter characteristic, a low frequency domain of the signal is intercepted to cause a distortion in the waveform of the rectangular wave, thereby causing a problem in that an error rate in recording and reproduction of the signal may be deteriorated.
To solve this problem, a base line correction processing provided on a read channel (for example, a read channel shown in FIG. 1) may be used, or an encoder and a decoder that suppresses direct-current (DC) components in the rectangular wave signal need to be used. For example, there are an encoder and a decoder using a DC-free run-length-limited (RLL) encoding method, which have already been installed in the storage unit such as the magnetic disk and the magneto-optical disk (see, for example, K. A. Schouhamer Immink, “Codes for Mass Data Storage Systems”, The Netherlands, Shannon Foundation Publishers, November 2004).
The DC-free RLL encoding method has a function of suppressing the DC components in the signal. In an RLL code, in a bit string, the smallest number and the largest number of continuous “0” are limited.
In the RLL code, the limitation on the largest number of continuous “0” is referred to as a condition of G constraint, and the limitation on the largest number of continuous “0” in an odd bit or even bit is referred to as a condition of I constraint, and these conditions of constraint are expressed as (0, G/I).
By imposing the condition of G constraint, error propagation is suppressed when decoding a read signal from the magnetic head, and synchronization becomes easy at the time of decoding. Furthermore, by imposing the condition of I constraint, error propagation that cannot be suppressed by the condition of G constraint can be suppressed.
As a method of evaluating whether the DC components are suppressed, there is a method of calculating a peak width of running digital sum (RDS). FIG. 33 is an explanatory diagram of an evaluation method of evaluating the suppressed amount of the DC component.
As shown in FIG. 33, with this evaluation method, when a bit value of a bit string in a recording and reproduction signal is “0”, “−1” is added, and when the bit value is “1”, “1” is added, to calculate the RDS value.
After finishing calculation of the RDS value for all bit values included in the bit string, a peak width in which an absolute value of the RDS value becomes the largest is calculated. In the case of FIG. 33, the peak width becomes “3”.
To reduce the DC component, it is better to have the peak width as small as possible. By checking the RDS value, the suppressed amount of the DC components can be evaluated. Therefore, the DC-free code can be said to be a code capable of reducing the peak width.
In the RLL encoding method, encoding is performed according to a conversion table. When the code rate (information bit length/code bit length) increases, the size of the conversion table also increases. Accordingly, an encoding method that can efficiently perform encoding even when the code rate is large is desired.
When the code rate is relatively large, there is a guided scrambling method to suppress the DC components. In this method, the bit string in the recording and reproduction signal is converted to a plurality of scrambled strings, and peak widths of the respective scrambled strings are calculated. A scrambled string having the smallest peak width is then selected as a scrambled string in which the DC components are suppressed (for example, I. J. Fair, W. D. Grover, W. A. Kryzymien, and R. I. MacDonald, “Guided Scrambling: A New Line Coding Technique for High Bit Rate Fiber Optic Transmission Systems”, IEEE Transactions on Communications, Vol. 39, No. 2, February 1991).
However, the conventional technique by the guided scrambling method has a problem in that when the code rate is extremely high, the error rate in recording and reproduction of the signal is hardly improved.
Specifically, the code rate in the longitudinal recording method currently used in the memory unit is as high as 0.99 or higher, but when the same code rate is required in the perpendicular recording method for suppressing the DC components, there is little improvement effect of the error rate even by using the guided scrambling method.
Furthermore, in the conventional guided scrambling method, it is necessary to provide the RLL encoder respectively in a plurality of scramblers that convert the bit string to the scrambled string. However, there is such a problem that the circuit size of the RLL encoder having a high code rate is considerably large, and providing the RLL encoders in a plurality of numbers leads to an increase in the circuit size.
Therefore, in the perpendicular recording method, it is an important object to develop an encoder and a decoder of recording and reproduction signals, which can improve the error rate even when the code rate is high, and reduce the circuit size.